Power Management Integrated Circuits (PMIC) for Aerospace Applications RFI
Key Takeaways
- Set-aside for No Set Aside businesses
- Work to be performed in PASADENA, CA
- Industry: Semiconductor and Related Device Manufacturing
- This is market research - no award at this stage
Contract Details
- Notice ID
- JSL-2651-8102026
- Opportunity Type
- Sources Sought
- Sub-Agency
- NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
- Office
- NASA MANAGEMENT OFFICE -- JPL
- Posted Date
- Wednesday, August 19, 2026
- Response Deadline
- Monday, August 31, 2026
- Set-Aside
- No Set Aside
- Place of Performance
- PASADENA, CA, 91109
- Status
- Active
Description
The California Institute of Technologys (Caltechs) Jet Propulsion Laboratory (JPL), located at 4800 Oak Grove Drive, Pasadena, CA 91109, is issuing the subject RFI to obtain information to assess current industry manufacturing and technical capabilities and receive ROM cost and schedule estimates supporting the development of Power Management IC (PMIC) suitable for NASA space missions. The requested information is for preliminary planning purposes only and does not constitute a commitment, implied or otherwise, that JPL will solicit you for such a procurement in the future. Neither JPL nor the Government will be responsible for any costs incurred by you in furnishing this information. Prospective subcontractors are advised that any information provided shall be deemed to be furnished with
Why This Opportunity Matters
NATIONAL AERONAUTICS AND SPACE ADMINISTRATION is conducting market research to identify potential sources for semiconductor and related device manufacturing with a set-aside for No Set Aside businesses in PASADENA, CA. Responding to this notice helps ensure your company is considered for the eventual solicitation.
Similar Opportunities
Browse Related
Looking for more opportunities?
Browse our full directory of government contracts
